Widely used active matrix image display devices comprise a matrix of active elements to constitute the drive system which drives the pixels arranged in a matrix form. Usually, in this kind of image display device, a great number of pixel circuits, each provided with an active element such as a thin film transistor (TFT) formed using a silicon semiconductor film, and drive circuits on an insulating substrate, making it possible to display high quality images. The following description will be made on the assumption that the active element is a thin film transistor (TFT) as a typical example.
Conventionally, the above-mentioned thin film transistor is formed using a noncrystalline (amorphous) silicon semiconductor film. However, such an amorphous silicon film is difficult to constitute a high speed/function circuit since the performance of the thin film transistor is limited as represented by the carrier (electron or hole) mobility. To provide a better image quality by realizing high mobility thin film transistors, it is effective to reform (crystallize) the amorphous silicon film to a polysilicon film (polycrystalline silicon film) before the thin film transistors are formed. This reformation is made by using the laser annealing method which irradiates the amorphous silicon film with a laser beam such as an excimer laser beam.
With reference to FIGS. 8(a) and 8(b), the following provides a description of the laser annealing reformation method which uses an excimer laser. FIGS. 8(a) and 8(b) schematically show how an amorphous silicon film is crystallized by a scanning excimer pulse laser which is used most commonly in this method. FIG. 8(a) illustrates the configuration of an insulating substrate SUB on which a semiconductor film to be irradiated is formed. FIG. 8(b) shows how the reformation is performed by laser irradiation. Glasses or ceramics are used for the insulating substrate SUB.
In FIGS. 8(a) and 8(b), the insulating substrate SUB has an amorphous silicon film ASI deposited thereon via an underlying film BFL (SiO/SiN or the like). A linear excimer laser beam ELA having a width of several ten to hundred nanometers is used to anneal the amorphous silicon film ASI. By moving the irradiation position intermittently every one or several pulses in one direction (x direction) as indicated by the arrow, the whole amorphous silicon film ASI over the insulating substrate SUB is reformed to a polysilicon film PSI.
By performing various processes, such as etching, interconnect patterning and ion implantation, on the polysilicon film (grained crystalline silicon film) PSI obtained by the above-mentioned reformation method, a circuit composed of thin film transistors and others is formed. The resulting insulating substrate (active matrix substrate) SUB is used to manufacture an active matrix image display device such as a liquid crystal display device or an organic EL display device.
Providing a partial plan view of the portion irradiated with the laser beam shown in FIGS. 8(a) and 8(b), FIGS. 9(a) and 9(b) show how a thin film transistor is constructed. In FIG. 9(a), a thin film transistor fabrication section TRA is indicated. In FIG. 9(b), a thin film transistor is fabricated by patterning the thin film transistor fabrication section TRA of FIG. 9(a). As shown in FIG. 9(a), numerous crystallized silicon grains (grain-crystalline or micro-crystalline silicon semiconductor) ranging in size from 0.05 to 0.5 μm have grown uniformly to form the polycrystalline semiconductor film PSI across the portion irradiated with the laser beam. Each of most silicon semiconductor-grains (silicon crystals) has a closed grain boundary (between it and any adjacent silicon grain around it). The conventional reformation of a silicon film means such crystallization.
To form a pixel circuit or a drive circuit by using the above-mentioned reformed silicon film (polysilicon film PSI), etching is performed so that the transistor section TRA is left as a silicon film island PSI-L while the surrounding unnecessary section is all removed. Then, a gate insulating film (not shown in the figure), a gate electrode GT, a source electrode SD1, a drain electrode SD2 and others are deposited on the island PSI-L to form a thin film transistor.
The above-mentioned excimer laser annealing intends to improve the operating performance of active elements such as thin film transistors by allowing the active elements to be formed using a polysilicon film on an insulating substrate. However, this can not limitlessly raise the carrier (electron or hole) mobility in the channel of each thin film transistor since each of the crystal grains grown by excimer laser irradiation has a closed grain boundary as described above with reference to FIG. 9(b). In the channel between the source electrode and the drain electrode, movement of carriers is impeded due to these grain boundaries. This imposes a limit on the further improvement of the mobility. However, the circuit density of the drive circuitry is becoming larger with the recent trend toward higher definition. Thin film transistors or other active elements in an extremely dense drive circuitry are required to exhibit a much higher carrier mobility.
As a solution to this requirement, quasi-single crystallization technique is recently under study. In this technique, an amorphous or polycrystalline silicon film is scanned in a certain direction by a solid-state laser or the like. To develop laterally grown quasi-strip long semiconductor crystal grains in specific sections of the film, the film is selectively irradiated with the pulse-modulated continuous-wave (CW) or quasi-CW laser beam of the scanning laser.
FIGS. 10(a) to 10(c) are provided to explain how discrete sections are reformed to quasi-strip crystalline silicon film. FIG. 10(a) illustrates the scheme of this process. FIG. 10(b) shows an exemplary pulse-modulated output waveform of a continuous-wave laser while FIG. 10(c) is an exemplary output waveform of a quasi-CW laser. Use of “discrete” means that specific sections separate from each other are reformed by selectively irradiating the semiconductor film with the laser beam. Also note that these reformed discrete sections are denoted below as virtual tiles as the case may be. In FIG. 10(b) and FIG. 10(c), the horizontal axis represents the time T while the vertical axis represents the laser output intensity INT. The quasi-CW laser can substantially be used as a continuous-wave (CW) laser since its oscillation can be controlled at high frequencies beyond 100 MHz. In FIG. 10(b) and FIG. 10(c), light pulses each having a width of 10 ns to 100 ms are emitted by the continuous-wave laser and the quasi-CW laser through pulse modulation by an EO modulator. Below, either laser is denoted as a pulse-modulated laser.
The insulating substrate SUB1 has a buffer layer or underlying layer BFL thereon. To attain virtual tiles of quasi-strip crystalline silicon, the polysilicon film PSI formed on the underlying layer BFL is selectively irradiated with the pulse-modulated laser beam SXL shown in FIG. 10(b) or 10(c). The pulse-modulated laser beam SXL is emitted from a continuous wave laser as shown in FIG. 10(b) or from a quasi-CW laser as shown in FIG. 10(c). Each irradiation period continues for 10 ns to 100 ms. As shown in FIG. 10(a), the laser SXL is swept in the x direction over the polysilicon film PSI. Then, after shifted in the y direction, the laser SXL is swept in the -x direction. As a result, specific sections of the polysilicon film PSI are reformed to quasi-strip crystalline films SPSIs where long crystal grains are grown in the scanned directions x and -x. The insulating substrate SUB1 has an alignment mark MK thereon. This mark MK is used as an alignment target when the laser SXL is swept. Intermittent laser irradiation, while the substrate is scanned, makes it possible to arrange the quasi-strip crystalline silicon films SPSI like discrete tiles.
FIGS. 11(a) and 11(b) are provided to explain the crystalline structure of the quasi-strip crystalline silicon film. FIG. 11(a) schematically shows how the pulse-modulated laser SXL is swept. In FIG. 11(b), the crystallinity of the quasi-strip crystalline silicon film SPSI formed through irradiation by the pulse-modulated laser beam SXL is schematically shown in comparison with that of the remaining polysilicon film PSI which was not irradiated. As a result of reforming the crystallinity of the polysilicon film PSI by the scanning pulse-modulated laser SXL as shown FIG. 11(a), the quasi-strip crystalline silicon film SPSI is formed where single crystals are grown like strips extending in the scanning direction of the laser. Referential name CB indicates a grain boundary in the quasi-strip crystalline silicon film SPSI.
The average grain size in the quasi-strip crystalline silicon film SPSI is about 5 μm long in the scanning direction of the pulse-modulated laser beam SXL and about 0.5 μm wide in the direction perpendicular to the scanning direction (width of a grain boundary CB). The grain size in the scanning direction varies depending on the condition of the pulse-modulated laser SXL such as energy (power), scanning speed and pulse width. By contrast, the average grain size in the polysilicon film PSI is about 0.6 μm (0.3 to 1.2 μm). Due to such a different crystalline structure, the quasi-strip crystalline silicon film SPSI can substantially serve as a single crystal. Using the quasi-strip crystalline silicon film SPSI to fabricate a thin film transistor makes it possible to attain a high electron mobility beyond 300-500 cm2/V·s since the movement of carriers is not impeded by grain boundaries if the length direction of crystal grains is aligned to the direction of electrical current. Electron mobility in the polysilicon film PSI is about 120 cm2/V·s at highest.
In Patent Documents 1, 2, 3 and 4, prior art techniques are disclosed which concern the crystallization of silicon films to quasi-strip crystalline silicon and display devices in which thin film transistors are formed using quasi-strip crystalline silicon films.
[Patent Document 1]
Japanese Patent Laid-Open No. 1999-121753
[Patent Document 2]
Japanese Patent Laid-Open No. 2002-222957
[Patent Document 3]
Japanese Patent Laid-Open No. 2003-179068
[Patent Document 4]
Japanese Patent Laid-Open No. 2004-54168